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Hire Kamaraj A.

India

USD 12 /hr

VLSI Desing and Quantum Computing Researcher with 18 years of experience.

Profile Summary

Dr. A. Kamaraj is an Associate Professor in the Department of Electronics and Communication Engineering at Mepco Schlenk Engineering College, Sivakasi, with 18.5 years of cumulative teaching and research experience. His research focuses on reversible logic circuits, quantum cellular automata (QCA), FPGA-based accelerators, and low-power VLSI design. He holds a Ph.D. in Information & Communication Engineering from Anna University (2014–2020), an M.E. in VLSI Design (Kongu Engineering College, 2006), and a B.E. in Electronics & Communication Engineering (Sri Ramakrishna Engineering College, 2003).

Research Contributions

Patents: 2 granted and 2 published (including “Intelligent Helmet for Safe-Riding on Two-Wheeler” and “Parallel Processor with Multi-Mode Concurrent Execution Units”).

Copyrights: 3 granted (Manual Analog VLSI Design & Laboratory manuals).

Publications: 54 papers – 27 international journal articles (8 SCI, 12 Scopus indexed), 24 international conference papers (7 IEEE), 10 national conference papers, and 4 book chapters (Springer, Taylor & Francis, IGI).

Citation Metrics: Google Scholar – 206 citations, h-index 8; ResearchGate Score 214.3 with 173 citations and 26,395 reads.

Subject Matter Expertise

Services

Writing

Writing Technical Writing, Business & Legal Writing

Work Experience

Associate Professor

Mepco Schlenk Engineering College

June 2008 - Present

AssociateProfessor

Mepco Schlenk Engineering College

June 2008 - December 2025

Education

Ph.D.

Anna University, Chennai

January 2014 - March 2020

Certifications

CMOS Digital VLSI Design

NPTEL

January 2024 - Present

Publications

JOURNAL ARTICLE

S. Vijayakumar, M. Mathivanan, M. Sathiya, A. Kamaraj (2025). Optimised elliptic curve cryptography architecture for improved V2x communication . Analog Integrated Circuits and Signal Processing.

Kamaraj Arunachalam, Divya Bharathi Jaya Baskar, Vishnu Chithra Ramaraj (2024). Area and power efficient FIR filter design in quantum cellular automata using competent adder . Engineering Research Express.

A. Kamaraj (2024). Secured V2X communication using optimized prime field ECC architecture . Journal of Applied Research and Technology.

Programmable implementation of time-area-efficient Elliptic Curve Cryptography for entity authentication @article{2022, doi = {10.33180/infmidem2022.203}, url = {https://doi.org/10.33180%2Finfmidem2022.203}, year = 2022, month = {aug}, publisher = {Drustvo {MIDEM}}, volume = {51}, number = {3}, title = {Programmable implementation of time-area-efficient Elliptic Curve Cryptography for entity authentication}, journal = {Informacije {MIDEM} - Journal of Microelectronics, Electronic Components and Materials}} . Informacije MIDEM - Journal of Microelectronics, Electronic Components and Materials.

Kamaraj A, Kamaraj Arunachalam, Kalyana Sundaram Chandran(2021). Effects of Heartfulness Meditation Practices on Control of Alz-heimer’s Disease: A Comprehensive Review . Iranian Journal of Public Health. Knowledge E

Kamaraj, A and Marichamy, P and Abirami, R(2021). Multi-Port Memory Design in Quantum Cellular Automata Using Logical Crossing . Informacije MIDEM. 51. (1). p. 49--61. MIDEM Society

Kamaraj A, Senthil Kumar J, Kalyana Sundaram C, Shobana G, Kirubakaran G (2020). A comprehensive review on accuracy in ultrasonic flow measurement using reconfigurable systems and deep learning approaches . AIP Advances.

Kumar J, J Senthil and Kamaraj, A and Sundaram, C Kalyana and Shobana, G and Kirubakaran, G(2020). A comprehensive review on accuracy in ultrasonic flow measurement using reconfigurable systems and deep learning approaches . AIP Advances. 10. (10). p. 105221--1. AIP Advances

Kamaraj, A and Marichamy, P(2020). Design of fault-tolerant reversible Vedic multiplier in quantum cellular automata . Journal of the National Science Foundation of Sri Lanka. 47. (4). p. 371--382. National Science Foundation of Sri Lanka

Kamaraj. A and Marichamy. P(2019). Design of integrated reversible fault-tolerant arithmetic and logic unit . Microprocessors and Microsystems. 69. p. 16--23. Elsevier {BV}

Kamaraj. A, Marichamy. P(2019). Design of integrated reversible fault-tolerant arithmetic and logic unit . Microprocessors and Microsystems. 69. p. 16--23. Elsevier {BV}

Kamaraj, A and Marichamy, P(2019). Design of fault-tolerant reversible Vedic multiplier in quantum cellular automata . Journal of the National Science Foundation of Sri Lanka. 47. (4). p. 371--382.

Kamaraj, A and Marichamy, P(2019). Design of integrated reversible fault-tolerant arithmetic and logic unit . Microprocessors and Microsystems. 69. p. 16--23. ELSEVIER RADARWEG 29, 1043 NX AMSTERDAM, NETHERLANDS

A, K., P, M.(2019). Design of integrated reversible fault-tolerant arithmetic and logic unit . Microprocessors and Microsystems. 69. p. 16-23.

Kamaraj, A and Parimalah, A Daisy and Priyadharshini, V(2017). Realisation of Vedic Sutras for Multiplication in Verilog.

Kamaraj, A and Marichamy, P and Devi, S Karthika and Nagalakshmisubraja, M(2017). Design and implementation of adders using novel reversible gates in quantum cellular automata . Indian Journal of Science and Technology. 9. (8). p. 1--7.

(2016). Design and Implementation of Adders Using Novel Reversible Gates in Quantum Cellular Automata . Advances in Natural and Applied Sciences.

Kamaraj, A., Marichamy, P., Devi, S.K., Subraja, M.N.(2016). Design and implementation of adders using novel reversible gates in Quantum cellular automata . Indian Journal of Science and Technology. 9. (8).

Kamaraj A, Punitha M, Karthika Devi, Viji.(2016). Shop Security System (SSS) Using GSM. International Journal of Engineering Science Technology And Research. 1. (1). p. 53--58.

Kamaraj, A and Marichamy, P and Devi, S Karthika and Subraja, M Nagalakshmi(2016). Design and implementation of adders using novel reversible gates in quantum cellular automata . Indian Journal of Science and Technology. 9. (8). p. 1--7.

(2015). Design of Reversible Logic Based Area Efficient Multilayer Architecture Router in QCA. International Journal of Applied Engineering Research.

(2015). Design of Reversible Logic based Single Precision Floating Point Multiplier for FFT. International Journal of Applied Engineering Research.

Kamaraj, A and Marichamy, P and Ramya, S(2015). Design of Reversible Logic based Single Precision Floating Point Multiplier for FFT. International Journal of Applied Engineering Research. 10. (1). p. 157--162.

Kamaraj, A and Marichamy, P and Ramya, S(2015). Design of Reversible Logic based Single Precision Floating Point Multiplier for FFT. Int. J. Appl. Eng. 10. (1). p. 157--162.

Kamaraj, A and Marichamy, P and Abinaya, M(2015). Design of reversible logic based area efficient multilayer architecture router in QCA. Int J Appl Eng Res. 10. (1). p. 140--144.

Kamaraj, A and Anand, I Vivek and Marichamy, P(2014). Design of low power combinational circuits using reversible logic and realization in quantum cellular automata. International Journal of Innovative Research in Science, Engineering and Technology. 3. (3). p. 1449--1456.

Kamaraj Arunachalam and Marichamy Perumalsamy and C. Kalyana Sundaram and J. Senthil Kumar(2014). DESIGN AND IMPLEMENTATION OF A REVERSIBLE LOGIC BASED 8-BIT ARITHMETIC AND LOGIC UNIT . International Journal of Computers and Applications. 36. (2). {ACTA} Press

Kamaraj Arunachalam, Marichamy Perumalsamy, C. Kalyana Sundaram and J. Senthil Kumar(2014). DESIGN AND IMPLEMENTATION OF A REVERSIBLE LOGIC BASED 8-BIT ARITHMETIC AND LOGIC UNIT . International Journal of Computers and Applications. 36. (2). p. 49--55. ACTA Press

Kamaraj, A and Sundaram, C Kalyana and Kumar, J Senthil(2013). Design of 8-Bit Arithmetic Processor Unit based on Reversible Logic. Global Journal of Research In Engineering.

Kamaraj, A and Tulasiram, PS and Vasanth, JJ(2013). Implementation of Wheelchair Controller using Eyeball Movement for Paralytic People. Dept. of ECE, Mepco Schlenk Engineering College, Tamil Nadu, IJESRT.

Kamaraj, A and Tulasiram, PS and Vasanth, JJ(2013). Implementation of wheelchair controller using eyeball movement for paralytic people. Dept. of ECE, Mepco Schlenk Engineering College, Tamil Nadu, IJESRT.

A.Kamaraj, CKS, JSK(2012). FPGA Implementation of Pipelined 8 Tap FIR Filter. Karpagam JCS. 7. (1). p. 15--22. Karpagam JCS

Kamaraj A, Kalyana Sundaram, Senthil Kumar J.(2012). FPGA implementation of pipelined 8 tap FIR Filter. Karpagam Journal of Computer Science. 7. (1). p. 15--22.

A.Kamaraj, C.Kalyana Sundaram, J.Senthilkumar(2012). Pipelined FIR Filter Implementation using FPGA. International Journal of Scientific Engineering and Technology. 1. (4). p. 55--60. www.ijset.com

A.Kamaraj, CKS, JSK(2012). FPGA Implementation of Pipelined 8 Tap FIR Filter. Karpagam JCS. 7. (1). p. 15--22. Karpagam JCS

Kamaraj, Mr A and Nandhini, M Pavi Nimrasha T and Marichamy, PDesign of Fault Tolerant Reversible Multipliers using novel Reversible Gates.

Kamaraj, A and Monica, X SharlyDesign of Out-of-Order Superscalar Processor with Speculative Thread Level Parallelism.

Kamaraj, AImplementation of Wheelchair Contro.

Kamaraj, A and Sundaram, C Kalyana and Kumar, J SenthilRealization of Adaptive Filter using Vedic Multiplier.

Kamaraj, A and Marichamy, P and Bharathi, J DhivyaRealization of N-Bit Fault Tolerant Division unit using Reversible Logic in QCA.

CONFERENCE PAPER

Kamaraj, A and Marichamy, P(2017). Design and implementation of arithmetic and logic unit (ALU) using novel reversible gates in quantum cellular automata . 2017 4th International Conference on Advanced Computing and Communication Systems (ICACCS). p. 1--8.

Kamaraj, A., Marichamy, P.(2017). Design and implementation of arithmetic and logic unit (ALU) using novel reversible gates in quantum cellular automata . 2017 4th International Conference on Advanced Computing and Communication Systems, ICACCS 2017.

Kamaraj, A, Marichamy, P \& Dhivya Bharathi, J(2017). Design of N-Bit Fault Tolerant Division Unit Using New Reversible Gates in QCA. International Conference on Communication, Computing and Networking ICCCN-2017. p. 643--650.

Kamaraj A, Marichamy P, Dhivya Bharathi(2017). Design of N-Bit Fault Tolerant Division Unit using New Reversible Gates in Quantum Cellular Automata (QCA). 2nd International Conference on Recent Trends in Engineering and Technology.

Kamaraj A, Sridhar Raj, Kalyana Sundaram, Senthil Kumar .(2017). Real Time Implementation of Adaptive Gradient Filtering based Vedic Multiplier in FPGA. International Conference on Advanced Computing and Communication Systems (ICACCS -2017).

Kamaraj, A and Marichamy, P and Subraja, M Nagalakshmi(2016). Design and Implementation of Floating Point Multiplier in Reversible Logic with Novel Gates. International Conference on Innovations in Engineering and Technology (ICIET).

Kamaraj, A and Radha, K and Priyanka, M and Punitha, M(2016). Intelligent transport system using integrated GPS optimized reader . 2016 Second International Conference on Science Technology Engineering and Management (ICONSTEM). p. 332--336.

Kamaraj, A., Radha, K., Priyanka, M., Punitha, M.(2016). Intelligent transport system using integrated GPS optimized reader . 2016 2nd International Conference on Science Technology Engineering and Management, ICONSTEM 2016. p. 332-336.

Kamaraj A, Karthika Devi, Marichamy P.(2016). Optical Implementation of Novel Reversible Gates Using Mach-Zehnder Interferometer. International Conference on Innovations in Engineering and Technology (ICIET) -- 2016.

Kamaraj, A., Abinaya, Ramya, S.(2015). Design of router using Reversible Logic in Quantum Cellular Automata . 2014 International Conference on Communication and Network Technologies, ICCNT 2014. 2015-March. p. 249-253.

Anand, I.V., Kamaraj, A.(2015). Design of combinational logic circuits for low power reversible logic circuits in quantum cellular automata . 2014 International Conference on Information Communication and Embedded Systems, ICICES 2014.

Kamaraj, A(2014). Design of combinational logic circuits for low power reversible logic circuits in quantum cellular automata, 2014 Int. Conf. Information Communication and Embedded Systems (ICICES).

Kamaraj, A and Ramya, S and others(2014). Design of router using reversible logic in quantum cellular automata . 2014 International Conference on Communication and Network Technologies. p. 249--253.

Kamaraj A, Vivek Anand I.(2014). Design of Combinational Logic Circuits like Ripple Carry Adder, Carry Delay Multipliers for Low Power Reversible Logic Circuits in Quantum Cellular Automata and Tanner Tools. IEEE International Conference on Innovations in Engineering and Technology (ICIET’14).

Anand, I Vivek and Kamaraj, A(2014). Design of combinational logic circuits for low power reversible logic circuits in quantum cellular automata . International Conference on Information Communication and Embedded Systems (ICICES2014). p. 1--6.

Kamaraj, A and Rakesh(2012). Trapping a Moving Projectile using Hoverbot. National Conference on Emerging Trends in Signal Processing & Wireless Technology (ETSWT ’12),. 1. (2). p. 5--10.

A, Kamaraj and Asokan(2006). Design and Performance Evaluation of Integrated Mobile Ad-Hoc and Cellular Networks. National Conference on Intelligent Integrated Control and Automation (IICA 2006). 1. (1). p. 1--6.

Kamaraj, A and Asokan(2006). Performance Evaluation of Integrated Mobile Ad-Hoc and Cellular Networks using GPSR. National Conference on Advances in Electronic Communications (ADELCO 2006),. 1. (1). p. 1--5.

level-one heading

VLSI Desing and Quantum Computing Researcher with 18 years of experience.

Associate Professor

Mepco Schlenk Engineering College

AssociateProfessor

Mepco Schlenk Engineering College

Ph.D.

Anna University, Chennai

CMOS Digital VLSI Design

NPTEL